Mid-range FPGAs feature high-speed transceivers, security options, and non-volatile operation
Targeting communications infrastructure, the PolarFire family offers GHz-speed IO and serial lanes
Built on a 28-nm non-volatile process technology, the PolarFire FPGA family targets high-speed, low-power applications. The devices incorporate eight to 24 power-optimized 12.7-GHz transceiver lanes (
PolarFire devices cover the mid-range FPGA density, with a fabric of 109K to 418K LUTs, 336 to 1,480 18 x 18 multiply-accumulate blocks, and up to 33 Mbits of RAM along with non-volatile and ROM storage. Family members all include such security features as tamper detection, unclonable storage for security keys, and built-in signed certificates. Some family members offer additional security features, including true random-number generation, a crypto co-processor, and CRI DPA pass-through licensing.
The family’s non-volatile fabric helps keep static power requirements to a minimum and avoid SRAM in-rush current and the need for external configuration storage. In addition, the devices an API-callable Flash-Freeze puts the device into a low-power quiescent state. In this state, all user IO configurations are latched, inputs and outputs are disabled, and the system controller clock drops to 2 MHz.
PolarFire FPGAs can operate at 1.0 V and 1.05 V, offering the end user the ability to trade off power and performance to match the application requirements.